Modulation of the effective work function of fully-silicided (FUSI) gate stacks

被引:10
作者
Kittl, J. A.
Lauwers, A.
Pawlak, A. A.
Veloso, A.
Yu, H. Y.
Chang, S. Z.
Hoffmann, T.
Pourtois, G.
Brus, S.
Demeurisse, C.
Vrancken, C.
Absil, P. P.
Biesemans, S.
机构
[1] IMEC, Texas Instruments, B-3001 Heverlee, Belgium
[2] IMEC, TSMC, B-3001 Heverlee, Belgium
关键词
fully silicided (FUSI) gates; silicides; work function; high-k dielectrics;
D O I
10.1016/j.mee.2007.04.002
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A systematic analysis of the different methods of work function (WF) tuning for gate stacks using fully siticided (FUSI) gate electrodes is presented. We show that FUSI gates have the potential to meet the WF requirements for future nodes, including high performance applications, achieving band edge WF, with total WF range of up to similar to 900 meV. The introduction of dopants (such as Sb, As, P, B) by ion implantation is shown to be effective to tune the WF of NiSi or Ni3Si2 on SiO2 or SiON by similar to 550 meV, but is ineffective on HfSiON or for Ni-richer silicides. Different silicide phases can be used for Ni FUSI gates on HfSiON dielectrics, taking advantage of the higher WF of metal-rich silicides, achieving a WF range of similar to 400 meV. This method is not effective, however, on SiON dielectrics. The introduction of Lanthanides by several techniques (such as dielectric cap deposition, ion implantation into poly-Si, or at metal deposition) that result in the modification of the dielectric, is found, for Ni FUSI gates, to achieve low WF (similar to 4.0 eV) suitable for NMOS. Similarly, incorporation of Al can be used to achieve PMOS type WF, as well as the use of metal-rich Ni and/or Pt based FUSI gates (with WF as high as 5.0 eV).
引用
收藏
页码:1857 / 1860
页数:4
相关论文
共 13 条
[1]   Interfacial segregation of dopants in fully silicided metal-oxide-semiconductor gates [J].
Copel, M ;
Pezzi, RP ;
Cabral, C .
APPLIED PHYSICS LETTERS, 2005, 86 (25) :1-3
[2]  
GUSEV EP, 2004, IEEE IEDM, P13
[3]   Threshold voltage control in NiSi-gated MOSFETs through SIIS [J].
Kedzierski, J ;
Boyd, D ;
Cabral, C ;
Ronsheim, P ;
Zafar, S ;
Kozlowski, PM ;
Ott, JA ;
Ieong, M .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2005, 52 (01) :39-46
[4]   Work function of Ni3Si2 on HfSixOy and SiO2 and its implication for Ni fully silicided gate applications [J].
Kittl, J. A. ;
O'Sullivan, B. J. ;
Kaushik, V. S. ;
Lauwers, A. ;
Pawlak, M. A. ;
Hoffmann, T. ;
Demeurisse, C. ;
Vrancken, C. ;
Veloso, A. ;
Absil, P. ;
Biesemans, S. .
APPLIED PHYSICS LETTERS, 2007, 90 (03)
[5]   CMOS integration of dual work function phase-controlled Ni fully silicided gates (NMOS:NiSi, PMOS:Ni2Si, and Ni31Si12) on HfSiON [J].
Kittl, J. A. ;
Lauwers, A. ;
Veloso, A. ;
Hoffmann, T. ;
Kubicek, S. ;
Niwa, M. ;
van Dal, M. J. H. ;
Pawlak, M. A. ;
Brus, S. ;
Demeurisse, C. ;
Vrancken, C. ;
Absil, P. ;
Biesemans, S. .
IEEE ELECTRON DEVICE LETTERS, 2006, 27 (12) :966-968
[6]   Linewidth effect and phase control in Ni fully silicided gates [J].
Kittl, J. A. ;
Lauwers, A. ;
Hoffmann, T. ;
Veloso, A. ;
Kubicek, S. ;
Niwa, M. ;
van Dal, M. J. H. ;
Pawlak, M. A. ;
Demeurisse, C. ;
Vrancken, C. ;
Brijs, B. ;
Absil, P. ;
Biesemans, S. .
IEEE ELECTRON DEVICE LETTERS, 2006, 27 (08) :647-649
[7]   Work function of Ni silicide phases on HfSiON and SiO2:: NiSi, Ni2Si, Ni31Si12, and Ni3Si fully silicided gates [J].
Kittl, JA ;
Pawlak, MA ;
Lauwers, A ;
Demeurisse, C ;
Opsomer, K ;
Anil, KG ;
Vrancken, C ;
van Dal, MJH ;
Veloso, A ;
Kubicek, S ;
Absil, P ;
Maex, K ;
Biesemans, S .
IEEE ELECTRON DEVICE LETTERS, 2006, 27 (01) :34-36
[8]   Mechanisms of arsenic segregation to the Ni2Si/SiO2 interface during Ni2Si formation -: art. no. 181910 [J].
Pawlak, MA ;
Janssens, T ;
Lauwers, A ;
Vantomme, A ;
Vandervorst, W ;
Maex, K ;
Kittl, JA .
APPLIED PHYSICS LETTERS, 2005, 87 (18) :1-3
[9]   Modulation of the workfunction of Ni fully silicided gates by doping: Dielectric and silicide phase effects [J].
Pawlak, MA ;
Lauwers, A ;
Janssens, T ;
Anil, KG ;
Opsomer, K ;
Maex, K ;
Vantomme, A ;
Kittl, JA .
IEEE ELECTRON DEVICE LETTERS, 2006, 27 (02) :99-101
[10]   First-principle calculations on gate/dielectric interfaces:: on the origin of work function shifts [J].
Pourtois, G ;
Lauwers, A ;
Kittl, J ;
Pantisano, L ;
Sorée, B ;
De Gendt, S ;
Magnus, W ;
Heyns, A ;
Maex, K .
MICROELECTRONIC ENGINEERING, 2005, 80 :272-279