PWM Control Techniques for Single-Phase Multilevel Inverter Based Controlled DC Cells

被引:14
作者
Sayed, Mahmoud A. [1 ]
Ahmed, Mahrous [2 ,3 ]
Elsheikh, Maha G. [2 ]
Orabi, Mohamed [2 ]
机构
[1] South Valley Univ, Fac Engn, Dept Elect Engn, Qena, Egypt
[2] Aswan Univ, Fac Engn, APEARC, Aswan, Egypt
[3] Taif Univ, Fac Engn, Dept Elect Engn, At Taif, Saudi Arabia
关键词
Multilevel inverter; PWM; Single-phase inverter; Voltage control; TOPOLOGY; CONVERTERS;
D O I
10.6113/JPE.2016.16.2.498
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a single-phase five-level inverter controlled by two novel pulse width modulation (PWM) switching techniques. The proposed PWM techniques are designed based on minimum switching power loss and minimum total harmonic distortion (THD). In a single-phase five-level inverter employing six switches, the first proposed PWM technique requires four switches to operate at switching frequency and two other switches to operate at line frequency. The second proposed PWM technique requires only two switches to operate at switching frequency and the rest of the switches to operate at line frequency. Compared with conventional PWM techniques for single-phase five-level inverters, the proposed PWM techniques offer high efficiency and low harmonic components in the output voltage. The validity of the proposed PWM switching techniques in controlling single-phase five-level inverters to regulate load voltage is verified experimentally using a 100 V, 500 W laboratory prototype controlled by dspace 1103.
引用
收藏
页码:498 / 511
页数:14
相关论文
共 29 条
[1]  
Agelidis V. G., 1997, P IEEE INT S IND EL, V2, P589
[2]  
Ahmed M, 2012, APPL POWER ELECT CO, P1521, DOI 10.1109/APEC.2012.6166022
[3]   A Cascade Multilevel Converter Topology With Reduced Number of Switches [J].
Babaei, Ebrahim .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2008, 23 (06) :2657-2664
[4]  
Beser E., 5 WSEAS IASME C EL P, P314
[5]   A Generalized Theory of Boundary Control for a Single-Phase Multilevel Inverter Using Second-Order Switching Surface [J].
Chan, Paul K. W. ;
Chung, Henry Shu-Hung ;
Hui, S. Y. .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2009, 24 (10) :2298-2313
[6]  
Corzine K. A., 2003, IEEE Power Electronics Letters, V1, P2, DOI 10.1109/LPEL.2003.814644
[7]   Multilevel inverter topology based on series connected switched sources [J].
Gupta, Krishna Kumar ;
Jain, Shailendra .
IET POWER ELECTRONICS, 2013, 6 (01) :164-174
[8]   A Single-Phase Multilevel Inverter Using Switched Series/Parallel DC Voltage Sources [J].
Hinago, Youhei ;
Koizumi, Hirotaka .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2010, 57 (08) :2643-2650
[9]   A Generalized Cascaded Multilevel Inverter Using Series Connection of Submultilevel Inverters [J].
Kangarlu, Mohammad Farhadi ;
Babaei, Ebrahim .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2013, 28 (02) :625-636
[10]   A unique fault-tolerant design for flying capacitor multilevel inverter [J].
Kou, XM ;
Corzine, KA ;
Familiant, YL .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2004, 19 (04) :979-987