Compensation strategy for high-speed three-stage switched-capacitor amplifiers

被引：11

作者：

Giustolisi, G. ^{[1
]}

Palumbo, G. ^{[1
]}

机构：

[1] Univ Catania, DIEEI, Catania, Italy

来源：

ELECTRONICS LETTERS | 2016年 / 52卷 / 14期

关键词：

SETTLING-TIME; MILLER COMPENSATION; OPTIMIZATION;

D O I：

10.1049/el.2016.1210

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this Letter a new compensation strategy for a class of three-stage operational transconductance amplifiers is proposed. The proposed approach reduces the original third-order transfer function of the loop gain to that of a pure two-pole amplifier thus allowing the designer to use well-known and consolidated design rules. The approach, suitable for high-speed switched-capacitor circuits, is validated by means of intensive Monte Carlo simulations on a 65-nm three-stage CMOS amplifier.

引用

收藏

页码：1202 / 1203

页数：2

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