Mixed-Domain Adaptive Blind Correction of High-Resolution Time-Interleaved ADCs

被引:1
作者
Seo, Munkyo [1 ]
Nam, Eunsoo [2 ]
Rodwell, Mark [3 ]
机构
[1] Sungkyunkwan Univ, Coll Informat & Commun Engn, Suwon, South Korea
[2] ETRI, Components & Mat Res Lab, Taejon, South Korea
[3] Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USA
基金
新加坡国家研究基金会;
关键词
Analog-to-digital conversion; mismatch; blind algorithm; adaptive technique; BACKGROUND CALIBRATION TECHNIQUE; TO-DIGITAL CONVERTER; MISMATCH ERRORS; GAIN; SKEW;
D O I
10.4218/etrij.14.0114.0110
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Blind mismatch correction of time-interleaved analog-to-digital converters (TI-ADC) is a challenging task. We present a practical blind calibration technique for low-computation, low-complexity, and high-resolution applications. Its key features are: dramatically reduced computation; simple hardware; guaranteed parameter convergence with an arbitrary number of TI-ADC channels and most real-life input signals, with no bandwidth limitation; multiple Nyquist zone operation; and mixed-domain error correction. The proposed technique is experimentally verified by an M = 4 400 MSPS TI-ADC system. In a single-tone test, the proposed practical blind calibration technique suppressed mismatch spurs by 70 dB to 90 dB below the signal tone across the first two Nyquist zones (10 MHz to 390 MHz). A wideband signal test also confirms the proposed technique.
引用
收藏
页码:894 / 904
页数:11
相关论文
共 26 条
[1]   TIME INTERLEAVED CONVERTER ARRAYS [J].
BLACK, WC ;
HODGES, DA .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1980, 15 (06) :1022-1029
[2]   Mixed-Signal Clock-Skew Calibration Technique for Time-Interleaved ADCs [J].
Camarero, David ;
Ben Kalaia, Karim ;
Naviner, Jean-Francois ;
Loumeau, Patrick .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2008, 55 (11) :3676-3687
[3]   Blind Calibration of Timing Skew in Time-Interleaved Analog-to-Digital Converters [J].
Divi, Vijay ;
Wornell, Gregory W. .
IEEE JOURNAL OF SELECTED TOPICS IN SIGNAL PROCESSING, 2009, 3 (03) :509-522
[4]   An analog background calibration technique for time-interleaved analog-to-digital converters [J].
Dyer, KC ;
Fu, DH ;
Lewis, SH ;
Hurst, PJ .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1998, 33 (12) :1912-1919
[5]   A 12-GS/s 81-mW 5-bit Time-Interleaved Flash ADC With Background Timing Skew Calibration [J].
El-Chammas, Manar ;
Murmann, Boris .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2011, 46 (04) :838-847
[6]   Blind adaptive equalization of mismatch errors in a time-interleaved A/D converter system [J].
Elbornsson, J ;
Gustafsson, F ;
Eklund, JE .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2004, 51 (01) :151-158
[7]   A digital background calibration technique for time-interleaved analog-to-digital converters [J].
Fu, DH ;
Dyer, KC ;
Lewis, SH ;
Hurst, PJ .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1998, 33 (12) :1904-1911
[8]   A background sample-time error calibration technique using random data for wide-band high-resolution time-interleaved ADCs [J].
Haftbaradaran, Afshin ;
Martin, Kenneth W. .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2008, 55 (03) :234-238
[9]   A CMOS 6-Bit 16-GS/s Time-Interleaved ADC Using Digital Background Calibration Techniques [J].
Huang, Chun-Cheng ;
Wang, Chung-Yi ;
Wu, Jieh-Tsorng .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2011, 46 (04) :848-858
[10]   Blind calibration of timing offsets for four-channel time-interleaved ADCs [J].
Huang, Steven ;
Levy, Bernard C. .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2007, 54 (04) :863-876