Hardware-based profiling: An effective technique for profile-driven optimization

被引:0
作者
Conte, TM [1 ]
Patel, BA [1 ]
Menezes, KN [1 ]
Cox, JS [1 ]
机构
[1] AT&T BELL LABS, GLOBAL INFORMAT SOLUT, DATABASE & COMP TECHNOL, COLUMBIA, SC 29170 USA
关键词
branch handling; profiling; compiler optimization; microarchitecture;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Profile-based optimization can be used for instruction scheduling, loop scheduling, data preloading, function in-lining, and instruction cache performance enhancement. However, these techniques have not been embraced by software vendors because programs instrumented for profiling run significantly slower, an awkward compile-run-recompile sequence is required, and a test input suite must be collected and validated for each program. This paper introduces hardware-based profiling that uses traditional branch handling hardware to generate profile information in real time. Techniques are presented for both one-level and two-level branch hardware organizations. The approach produces high accuracy with small slowdown in execution (0.4%-4.6%). This allows a program to be profiled while it is used, eliminating the need for a test input suite. With contemporary processors driven increasingly by compiler support, hardware-based profiling is important for high-performance systems.
引用
收藏
页码:187 / 206
页数:20
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