Impact of Backside Cu Contamination in the 3D integration Process

被引：0

作者：

Hozawa, Kazuyuki ^{[1
]}

Takeda, Kenichi ^{[1
]}

Torii, Kazuyoshi ^{[1
]}

机构：

[1] Hitachi Ltd, Cent Res Lab, Tokyo 1858601, Japan

来源：

2009 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2009年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The impact of backside Cu contamination during the 3D integration process was investigated and found that Cu diffusion was significantly enhanced by stress relief and wafer thinning. The thermal scattering, phenomenon of Cu is inevitable even under a low-temperature assembly process, which also caused Cu contamination. To prevent the Cu contamination, an Ar ion implantation for Cu gettering and a SiN Cu barrier is proposed.

引用

页码：172 / 173

页数：2

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