A Model-Based-Random-Forest Framework for Predicting Vt Mean and Variance Based on Parallel Id Measurement

被引:2
作者
Lin, Chien-Hsueh [1 ,2 ]
Tsai, Chih-Ying [1 ,2 ]
Lee, Kao-Chi [1 ,2 ]
Yu, Sung-Chu [3 ]
Liau, Wen-Rong [3 ]
Hou, Alex Chun-Liang [3 ]
Chen, Ying-Yen [4 ]
Kuo, Chun-Yi [4 ]
Lee, Jih-Nung [4 ]
Chao, Mango C. T. [1 ,2 ]
机构
[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 300, Taiwan
[2] Natl Chiao Tung Univ, Inst Elect, Hsinchu 300, Taiwan
[3] United Microelect Corp, R&D Dept, Hsinchu 300, Taiwan
[4] Realtek Semicond Corp, R&D Dept, Hsinchu 300, Taiwan
关键词
Machine learning; model-based random forest (MBRF); threshold voltage; wafer acceptance test (WAT);
D O I
10.1109/TCAD.2017.2783304
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
To measure the variation of device V-t requires long test for conventional wafer acceptance test (WAT) test structures. This paper presents a framework that can efficiently and effectively obtain the mean and variance of V-t for a large number of designs under test (DUTs). The proposed framework applies the model-based random forest as its core model-fitting technique to learn a model that can predict the mean and variance of V-t based only on the combined I-d measured from parallel connected DUTs. The proposed framework can further minimize the total number of I-d measurement required for prediction models while limiting their accuracy loss. The experimental results based on the SPICE simulation of a UMC 28-nm technology demonstrate that the proposed model-fitting framework can achieve a more than 99% R -squared for predicting either V-t mean or V-t variance. Compared to conventional WAT test structures using binary search, our proposed framework can achieve a 120.3x speedup on overall test time for test structures with 800 DUTs.
引用
收藏
页码:2139 / 2151
页数:13
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