A Fully Integrated 60-GHz 5-Gb/s QPSK Transceiver With T/R Switch in 65-nm CMOS

被引:22
作者
Kuang, Lixue [1 ]
Yu, Xiaobao [1 ]
Jia, Haikun [1 ]
Chen, Lei [1 ]
Zhu, Wei [1 ]
Wei, Meng [1 ]
Song, Zheng [1 ]
Wang, Zhihua [1 ]
Chi, Baoyong [1 ]
机构
[1] Tsinghua Univ, Inst Microelect, Beijing 100084, Peoples R China
基金
中国国家自然科学基金;
关键词
CMOS; millimeter wave; 60; GHz; transceiver; wideband; SPDT SWITCH; DESIGN;
D O I
10.1109/TMTT.2014.2364589
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A fully integrated 60-GHz 5-Gb/s quadrature phase-shift keying (QPSK) transceiver with the transmit/receive (T/R) switch in 65-nm CMOS is presented. By utilizing the co-design of the T/R switch with the power amplifier (PA)/low-noise amplifier, pi-type wideband passive network technique, as well as the modified distributed-amplifier-based PA, the RF bandwidth of the transmitter (TX)/receiver (RX) is extended to 5 GHz. An inductorless wideband programmable gain amplifier with negative capacitive neutralization, consisting of two modified Cherry-Hooper amplifier stages, provides 18-dB variable gain range with enough bandwidth. Due to the proposed bandwidth extension techniques, the measured double-side link bandwidth of the TX/RX is wider than 5 GHz so that 5-Gb/s QPSK communication could be supported. A direct QPSK modulator and mixed-signal QPSK demodulator are integrated to avoid the high-power high-complexity analog-digital converter/digital- analog converter and high-speed digital baseband processing. Together with the integrated T/R switch, the power consumption and the cost of the transceiver are significantly lowered while achieving up to 5-Gb/s data rate. The local oscillating signals and various clocks are provided by a fully differential phase-locked loop frequency synthesizer with -97.2-dBc/Hz phase noise at 1-MHz offset from a 40-GHz carrier. The measured error vector magnitude of the TX is -21.9 dB, while the bit error rate of the RX with a -52-dBm sine-wave input is below 8e - 7 when transmitting/receiving 5-Gb/s data. The transceiver is powered by 1.0- and 1.2-V supply (except the phase-frequency detector and charge-pump in the frequency synthesizer, which are powered by a 2.5-V supply) and consumes 135 mW in the TX mode and 176 mW in the RX mode, with a chip area of 3 mm x 2 mm.
引用
收藏
页码:3131 / 3145
页数:15
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