A Balanced Differential-Pair CMOS CCCII with Negative Intrinsic Resistance

被引：0

作者：

Chipipop, Boonruk ^{[1
]}

Chaisricharoen, Roungsan ^{[2
]}

Sirinaovakul, Boonchareon ^{[1
]}

机构：

[1] King Mongkuts Univ Technol, Fac Engn, Dept Comp Engn, VLSI, Bangkok, Thailand

[2] Mae Fah Luang Univ, Sch Informat Technol, Chiang Mai, Thailand

来源：

ISSCS 2009: INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS, VOLS 1 AND 2, PROCEEDINGS, | 2009年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A novel structure, based on balanced differential-pair, is proposed to implement the CMOS CCCII with negative intrinsic resistance at port X. HSPICE simulations, based on the AMS's 035 mu CMOS process, are conducted, which certainly confirm the occurrence of negative resistance. To demonstrate its capability, a two-phase current-mode oscillator is synthesized based on two lossless integrators. As little error in oscillated frequency is observed, the proposed structure earns its place as one of the attractive negative-resistance simulators.

引用

页码：429 / +

页数：2

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