Implications of fin width scaling on variability and reliability of high-k metal gate FinFETs

被引:15
作者
Chabukswar, S. [2 ]
Maji, D. [2 ]
Manoj, C. R. [2 ]
Anil, K. G. [2 ]
Rao, V. Ramgopal [2 ]
Crupi, F. [1 ]
Magnone, P. [1 ]
Giusi, G. [1 ]
Pace, C. [1 ]
Collaert, N. [3 ]
机构
[1] Univ Calabria, DEIS, I-87036 Arcavacata Di Rende, Italy
[2] Indian Inst Technol, Dept Elect Engn, Bombay, Maharashtra, India
[3] IMEC, B-3000 Leuven, Belgium
关键词
FinFETs; Variability; Reliability; Hot-carriers; Negative bias instability; IMPACT; PERFORMANCE; RESISTANCE;
D O I
10.1016/j.mee.2009.12.013
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, we report a study to understand the fin width dependence on performance, variability and reliability of n-type and p-type triple-gate fin field effect transistors (FinFETs) with high-k dielectric and metal gate. Our results indicate that with decreasing fin width the well-known performance improvement in terms of sub-threshold swing and drain-induced barrier lowering are accompanied by a degradation of the variability and the reliability. As a matter of fact fin width scaling causes (i) higher hot-carrier degradation (HC) in nFinFETs owing to the higher charge carrier temperature for the same internal stress voltages: (ii) worse negative bias temperature instability (NBTI) in pFinFETs due to the increased contribution from the (1 1 0) surface: (iii) higher variability due to the non-uniform fin extension doping, as highlighted by applying a novel characterization technique. (C) 2009 Elsevier B.V. All rights reserved.
引用
收藏
页码:1963 / 1967
页数:5
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