Characterization and Compact Modeling of Nanometer CMOS Transistors at Deep-Cryogenic Temperatures

被引：168

作者：

Incandela, Rosario M. ^{[1
,2
,3
]}

Song, Lin ^{[4
,9
]}

Homulle, Harald ^{[1
,2
,3
]}

Charbon, Edoardo ^{[3
,5
,6
]}

Vladimirescu, Andrei ^{[7
,8
]}

Sebastiano, Fabio ^{[1
,2
,9
]}

机构：

[1] Delft Univ Technol, Dept Quantum & Comp Engn, NL-2628 Delft, Netherlands

[2] QuTech, NL-2628 Delft, Netherlands

[3] Kavli Inst Nanosci, NL-2628 Delft, Netherlands

[4] Analog Devices Inc, Beijing 100192, Peoples R China

[5] Ecole Polytech Fed Lausanne, Adv Quantum Architectures Lab, CH-1015 Lausanne, Switzerland

[6] Intel Corp, Hillsboro, OR 97124 USA

[7] Univ Calif Berkeley, Berkeley Wireless Res Ctr, Berkeley, CA 94708 USA

[8] Inst Super Elect Paris, Micronano Elect & Radio Commun, F-75006 Paris, France

[9] Delft Univ Technol, Dept Microelect, NL-2628 Delft, Netherlands

来源：

IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY | 2018年 / 6卷 / 01期

关键词：

Cryogenic electronics; CMOS; cryogenic; cryo-CMOS; characterization; modeling; kink; 4; K; LNA; OXIDE-SEMICONDUCTOR TRANSISTORS; THRESHOLD VOLTAGE; MOS-TRANSISTORS; LIQUID-NITROGEN; BEHAVIOR; NOISE; KINK; HYSTERESIS; INTERFACE; FREQUENCY;

D O I：

10.1109/JEDS.2018.2821763

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Cryogenic characterization and modeling of two nanometer bulk CMOS technologies (0.16-mu m and 40-nm) are presented in this paper. Several devices from both technologies were extensively characterized at temperatures of 4 K and below. Based on a detailed understanding of the device physics at deep-cryogenic temperatures, a compact model based on MOS11 and PSP was developed. In addition to reproducing the device dc characteristics, the accuracy and validity of the compact models are demonstrated by comparing time- and frequency-domain simulations of complex circuits, such as a ring oscillator and a low-noise amplifier, with the measurements at 4 K.

引用

页码：996 / 1006

页数：11

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