Selective avoidance of cycles in irregular LDPC code construction

被引：233

作者：

Tian, T ^{[1
]}

Jones, CR ^{[1
]}

Villasenor, JD ^{[1
]}

Wesel, RD ^{[1
]}

机构：

[1] Univ Calif Los Angeles, Dept Elect Engn, Los Angeles, CA 90095 USA

来源：

IEEE TRANSACTIONS ON COMMUNICATIONS | 2004年 / 52卷 / 08期

基金：

美国国家科学基金会;

关键词：

error floor; extrinsic message degree (EMD); graph cycles; irregular low-density parity-check (LDPC) codes; iterative decoding; message passing; stopping sets; unstructured graph construction;

D O I：

10.1109/TCOMM.2004.833048

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This letter explains the effect of graph connectivity on error-floor performance of low-density parity-check (LDPC) codes under message-passing decoding. A new metric, called extrinsic message degree (EMD), measures cycle connectivity in bipartite graphs of LDPC codes. Using an easily computed estimate of EMD, we propose a Viterbi-like algorithm that selectively avoids small cycle clusters that are isolated from the rest of the graph. This algorithm is different from conventional girth conditioning by emphasizing the connectivity as well as the length of cycles. The algorithm yields codes with error floors that are orders of magnitude below those of random codes with very small degradation in capacity-approaching capability.

引用

页码：1242 / 1247

页数：6

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