On the FPGA Dynamic Partial Reconfiguration Interference on Real-Time Systems

被引：1

作者：

Reis, Joao Gabriel ^{[1
]}

Frohlich, Antonio Augusto ^{[1
]}

Hoeller, Arliones, Jr. ^{[1
,2
]}

机构：

[1] Univ Fed Santa Catarina, Software Hardware Integrat Lab, BR-88040900 Florianopolis, SC, Brazil

[2] Fed Inst Santa Catarina, Telecommun Dept, Florence, SC USA

来源：

2015 BRAZILIAN SYMPOSIUM ON COMPUTING SYSTEMS ENGINEERING (SBESC) | 2015年

关键词：

Dynamic partial reconfiguration; Real-Time; Field-programmable gate arrays (FPGAs); System-level design; HW/SW co-design; High-level synthesis;

D O I：

10.1109/SBESC.2015.28

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This work proposes a deterministic hardware and software reconfiguration scheme capable of mitigating interference on reconfiguration execution time generated by system components performing I/O operations. The scheme decomposes the reconfiguration process into small steps such that it is preemptable, transparent, dynamic and compliant with real-time requirements. Moreover, the impact of the interference on system reconfiguration time was modeled and analyzed. Results show that using the Xilinx Zynq-7000 platform employing an ARM Cortex-A9 processor the reconfiguration time can grow up to 92% when real-time threads are performing I/O operations during hardware reconfiguration.

引用

页码：110 / 115

页数：6

共 14 条

[1] Achieving programming model abstractions for reconfigurable computing [J].

Andrews, David ;

Sass, Ron ;

Anderson, Erik ;

Agron, Jason ;

Peck, Wesley ;

Stevens, Jim ;

Baijot, Fabrice ;

Komp, Ed .

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2008, 16 (01) :34-44

[2]

[Anonymous], VIV DES SUIT US GUID

[3]

[Anonymous], 2008, ALT CONF HDB

[4]

[Anonymous], 2015, SER FPGAS CONF US GU

[5] The erlangen slot machine: Increasing flexibility in FPGA-based reconfigurable platforms [J].

Bobda, C ;

Majer, M ;

Ahmadinia, A ;

Haller, T ;

Linarth, A ;

Teich, JG .

FPT 05: 2005 IEEE INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY, PROCEEDINGS, 2005, :37-42

[6]

Frohlich A. A., 2001, GMD RES SERIES

[7] Operating Systemfor Runtime Reconfigurable Multiprocessor Systems [J].

Goehringer, Diana ;

Huebner, Michael ;

Zeutebouo, Etienne Nguepi ;

Becker, Juergen .

INTERNATIONAL JOURNAL OF RECONFIGURABLE COMPUTING, 2011, 2011

[8]

Hoeller AS, 2006, INT FED INFO PROC, V225, P265

[9] FUSE: Front-end user framework for O/S abstraction of hardware accelerators [J].

Ismail, Aws ;

Shannon, Lesley .

2011 IEEE 19TH ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM), 2011, :170-177

[10] R3TOS: A Novel Reliable Reconfigurable Real-Time Operating System for Highly Adaptive, Efficient, and Dependable Computing on FPGAs [J].

Iturbe, Xabier ;

Benkrid, Khaled ;

Hong, Chuan ;

Ebrahim, Ali ;

Torrego, Raul ;

Martinez, Imanol ;

Arslan, Tughrul ;

Perez, Jon .

IEEE TRANSACTIONS ON COMPUTERS, 2013, 62 (08) :1542-1556

← 1 2 →