共 16 条
- [2] Elleithy K., 2015, NEW TRENDS NETWORKIN
- [4] Higher performance and lower power enhancements to VLIW architectures [J]. SIPS 2001: IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS: DESIGN AND IMPLEMENTATION, 2001, : 157 - 157
- [5] Design and implementation of a 1024-point pipeline FFT processor [J]. IEEE 1998 CUSTOM INTEGRATED CIRCUITS CONFERENCE - PROCEEDINGS, 1998, : 131 - 134
- [8] Low-power variable-length fast Fourier transform processor [J]. IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 2005, 152 (04): : 499 - 506
- [9] Proakis JG., 1995, DIGIT SIGNAL PROCESS, V3rd