Fast voltage regulator for multilevel flash memories

被引：4
|
作者：
Khouri, O [1 ]
Micheloni, R [1 ]
Gregori, S [1 ]
Torelli, G [1 ]
机构：
[1] Univ Pavia, Dept Elect, I-27100 Pavia, Italy
来源：
RECORDS OF THE 2000 IEEE INTERNATIONAL WORKSHOP ON MEMORY TECHNOLOGY, DESIGN AND TESTING | 2000年
关键词：
D O I：
10.1109/MTDT.2000.868613
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents a very fast recovery voltage regulator for large capacitive loads in multilevel (ML) Flash memories. A suitable low-power structure limits positive output overshoots during transients, thereby allowing the basic regulation loop to be designed for very high recovery speed. The circuit is therefore able to quickly restore the output voltage to its regulated value when a previously discharged capacitance is connected to its output. Typical applications include read,word-line and program bit-line voltage regulators for ML, Flash memories, where accurate and quickly regulated voltages are vital for optimal read and program operations. Computer simulations for a 0.18 mum 2 bit/cell 64 nib Flash memory are shown.
引用
收藏
页码：34 / 38
页数：5
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