The Implementation of I/O Interface in Quantum-dot Cellular Automata

被引：6

作者：

Zhang, Yongqiang ^{[1
]}

Xie, Guangjun ^{[1
]}

Cheng, Xin ^{[1
]}

Zhang, Zhang ^{[1
]}

Lv, Hongjun ^{[1
]}

机构：

[1] Hefei Univ Technol, Sch Elect Sci & Appl Phys, Hefei 230009, Anhui, Peoples R China

来源：

OPTIK | 2018年 / 166卷

基金：

中国国家自然科学基金;

关键词：

Quantum-dot cellular automata; I/O interface; Buffer; Latch; DESIGN; MEMORY; SIMULATION; DIVIDER; ADDER; GATE;

D O I：

10.1016/j.ijleo.2018.04.020

中图分类号：

O43 [光学];

学科分类号：

070207 ; 0803 ;

摘要：

Quantum-dot cellular automata (QCA), a novel computing paradigm with cellular automata, is an emerging technology with the characteristics such as high speed, low power consumption and high density. Various logical circuits have hitherto been studied, while as a bridge of CPU and its peripheral devices, I/O interface is unexplored to date. In this paper, two I/O interface schemes consisting of so called data buffer and date latch are hierarchically designed in QCA to implement data transmission between internal bus and external bus. These schemes are then compared and analyzed comprehensively to each other. The problem of conventional high-impedance state of tri-state gate is creatively solved by exchanging data in two paths synchronously due to the nonexistence of high-impedance state in two stable state approximation in QCA. Simulation results of these circuits are obtained with QCADesigner tool and hence the correctness of proposed circuits is confirmed. (C) 2018 Elsevier GmbH. All rights reserved.

引用

页码：177 / 188

页数：12

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