共 50 条
- [1] Symbolic model checking for probabilistic timed automata FORMAL TECHNIQUES, MODELLING AND ANALYSIS OF TIMED AND FAULT-TOLERANT SYSTEMS, PROCEEDINGS, 2004, 3253 : 293 - 308
- [4] RTL verification of timed asynchronous and heterogeneous systems using symbolic model checking PROCEEDINGS OF THE ASP-DAC '97 - ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 1997, 1996, : 181 - 188
- [5] Symbolic model checking of finite precision timed automata THEORETICAL ASPECTS OF COMPUTING - ICTAC 2005, 2005, 3722 : 272 - 287
- [6] Using MTBDDs for discrete timed symbolic model checking EUROPEAN DESIGN & TEST CONFERENCE - ED&TC 97, PROCEEDINGS, 1997, : 182 - 187
- [7] A new algorithm for discrete timed symbolic model checking HYBRID AND REAL-TIME SYSTEMS, 1997, 1201 : 18 - 32
- [8] Model checking timed systems with urgencies AUTOMATED TECHNOLOGY FOR VERIFICATION AND ANALYSIS, PROCEEDINGS, 2006, 4218 : 67 - 81
- [9] Bounded model checking for timed systems FORMAL TECHNIQUE FOR NETWORKED AND DISTRIBUTED SYSTEMS - FORTE 2002, PROCEEDINGS, 2002, 2529 : 243 - 259