Curtailing Perovskite Processing Limitations via Lamination at the Perovskite/Perovskite Interface

被引:39
作者
Dunfield, Sean P. [1 ,2 ,3 ]
Moore, David T. [1 ]
Klein, Talysa R. [1 ]
Fabian, David M. [1 ,6 ]
Christians, Jeffrey A. [1 ]
Dixon, Alex G. [1 ,2 ]
Dou, Benjia [1 ,5 ]
Ardo, Shane [6 ,7 ]
Beard, Matthew C. [1 ]
Shaheen, Sean E. [2 ,4 ,5 ]
Berry, Joseph J. [1 ,2 ,4 ]
van Hest, Maikel F. A. M. [1 ]
机构
[1] Natl Renewable Energy Lab, Golden, CO 80401 USA
[2] Univ Colorado Boulder, Renewable & Sustainable Energy Inst, Boulder, CO 80309 USA
[3] Univ Colorado Boulder, Mat Sci & Engn Program, Boulder, CO 80309 USA
[4] Univ Colorado Boulder, Dept Phys, Boulder, CO 80309 USA
[5] Univ Colorado Boulder, Dept Elect Comp & Energy Engn, Boulder, CO 80309 USA
[6] Univ Calif Irvine, Dept Chem, Irvine, CA 92697 USA
[7] Univ Calif Irvine, Dept Chem Engn & Mat Sci, Irvine, CA 92697 USA
关键词
SOLAR-CELLS; HALIDE PEROVSKITES; IODIDE PEROVSKITE; FORMAMIDINIUM; DEGRADATION; TEMPERATURE; MORPHOLOGY; TOLERANCE; EMERGENCE; LAYERS;
D O I
10.1021/acsenergylett.8b00548
中图分类号
O64 [物理化学(理论化学)、化学物理学];
学科分类号
070304 ; 081704 ;
摘要
Standard layer-by-layer solution processing methods constrain lead-halide perovskite device architectures. The layer below the perovskite must be robust to the strong organic solvents used to form the perovskite while the layer above has a limited thermal budget and must be processed in nonpolar solvents to prevent perovskite degradation. To circumvent these limitations, we developed a procedure where two transparent conductive oxide/transport material/perovskite half stacks are independently fabricated and then laminated together at the perovskite/perovskite interface. Using ultraviolet-visible absorption spectroscopy, external quantum efficiency, X-ray diffraction, and time-resolved photoluminesence spectroscopy, we show that this procedure improves photovoltaic properties of the perovskite layer. Applying this procedure, semitransparent devices employing two high-temperature oxide transport layers were fabricated, which realized an average efficiency of 9.6% (maximum: 10.6%) despite series resistance limitations from the substrate design. Overall, the developed lamination procedure curtails processing constraints, enables new device designs, and affords new opportunities for optimization.
引用
收藏
页码:1192 / 1197
页数:11
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