Critical area extraction for soft fault estimation

被引：11

作者：

Allan, GA ^{[1
]}

Walton, AJ ^{[1
]}

机构：

[1] Univ Edinburgh, Dept Elect Engn, Edinburgh EH9 3JL, Midlothian, Scotland

来源：

IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING | 1998年 / 11卷 / 01期

基金：

英国工程与自然科学研究理事会;

关键词：

critical area; defects; IC layout; reliability; soft faults; survey sampling; VLSI; yield estimation;

D O I：

10.1109/66.661294

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

Algorithms are presented for extracting the critical area associated with extra and missing material soft faults of an integrated circuit from the mask layout, These algorithms have been implemented within the Edinburgh Yield Estimator (EYE) tool which permits efficient extraction of the critical area from an arbitrary mask layout, Accurate estimates of device critical area of even the largest devices can be obtained in a reasonable time using the sampling version of the tool, The application of these algorithms to defect related reliability is explored and results reported that compare the susceptibility to soft faults before and after layout modifications intended to enhance manufacturing yield, These results suggest that field enhancement techniques can have a significant impact on defect-related device reliability.

引用

页码：146 / 154

页数：9

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