Code compression techniques for embedded systems and their effectiveness

被引：2

作者：

Sundaresan, K ^{[1
]}

Mahapatra, NR ^{[1
]}

机构：

[1] SUNY Buffalo, Dept Elect Engn, Buffalo, NY 14260 USA

来源：

ISVLSI 2003: IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, PROCEEDINGS: NEW TRENDS AND TECHNOLOGIES FOR VLSI SYSTEMS DESIGN | 2003年

关键词：

D O I：

10.1109/ISVLSI.2003.1183492

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Code compression techniques have been used widely in embedded systems to decrease the amount of storage resources needed or to decrease power consumption, and in some cases, to improve performance too. This paper evaluates, using cache models, the performance, power and cost benefits that code compression can provide in an instruction memory hierarchy. It also compares several important code compression schemes on a common platform and using a common set of benchmarks to gauge their effectiveness.

引用

页码：262 / 263

页数：2

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