Complementary pass-transistor adiabatic logic and sequential circuits using three-phase power supply

被引：0

作者：

Hu, JP ^{[1
]}

Zhang, WJ ^{[1
]}

Xia, YS ^{[1
]}

机构：

[1] Ningbo Univ, Fac Informat Sci & Techol, Ningbo 315211, Zhejiang, Peoples R China

来源：

2004 47TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, CONFERENCE PROCEEDINGS | 2004年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents the power optimization of complementary pass-transistor adiabatic logic (CPAL) and the design of adiabatic sequential circuits. CPAL circuits have more efficient energy transfer and recovery, because non-adiabatic energy loss of output loads has been completely, eliminated by using complementary pass-transistor logic for evaluation and transmission gates for energy-recovery. The minimization of energy consumption was investigated by choosing the optimal size of transistors. Adiabatic flip-flops (D, T and JK) are introduced. A practical sequential system designed with the proposed adiabatic flip-flops was demonstrated. With TSMC 0.25mum CMOS process, HSPICE simulation results show that the adiabatic flip-flop based on CPAL is about 2 to 3 times more energy efficient than 2N-2N2P and 3 to 6 times less dissipative than the static CMOS.

引用

页码：201 / 204

页数：4

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