Digital signal processor architectures and programming

被引：0

作者：

Kuo, SM ^{[1
]}

Gan, WS ^{[1
]}

机构：

[1] No Illinois Univ, Dept Elect Engn, De Kalb, IL 60115 USA

来源：

PROCEEDINGS OF THE 2004 IEEE ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 1 AND 2: SOC DESIGN FOR UBIQUITOUS INFORMATION TECHNOLOGY | 2004年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents modem digital signal processor architectures including multiply-accumulate unit, shifter, pipelining and parallelism, buses, data address generators, and special addressing modes and instructions. In addition, the most effective mixed C and assembly programming technique is suggested for software development.

引用

页码：365 / 368

页数：4

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