Virtualization of Reconfigurable Mixed-Criticality Systems

被引:2
作者
Wulf, Cornelia [1 ]
Charaf, Najdet [1 ]
Goehringer, Diana [1 ,2 ]
机构
[1] Tech Univ Dresden, Chair Adapt Dynam Syst, Dresden, Germany
[2] Tech Univ Dresden, Ctr Tactile Internet Human In The Loop CeTI, Dresden, Germany
来源
2022 32ND INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS, FPL | 2022年
关键词
FPGA virtualization; hypervisor; mixed criticality; real-time operating system; EDF-SCHEDULABILITY; TASKS;
D O I
10.1109/FPL57034.2022.00020
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The increasing complexity of reconfigurable embedded systems often requires the integration of multiple applications with potentially different levels of criticality on the same hardware platform. As the deployment scales, there is a need for resource management, isolation, and performance that makes FPGA virtualization techniques a key consideration. FPGA virtualization enables multiple guest operating systems to run with different requirements, such as real-time, safety, or security. Most state-of-the-art systems incorporate mechanisms to strictly isolate subsystems in spatial respect at the expense of lower resource utilization. In this work, we present L4ReC, a microkernel-based virtualization layer that enables the sharing of reconfigurable resources among multiple virtual machines. The mapping and scheduling strategy for hardware threads considers not only deadlines, but also the real-time levels of guest operating systems. A POSIX thread-based interface facilitates the access to hardware accelerators. Compared with an existing scheduler for hardware threads, the average utilization factor - indicating the FPGA resource usage - is 1,9 times higher when threads are mapped and scheduled with L4ReC. Deadline misses are reduced by 3%.
引用
收藏
页码:54 / 60
页数:7
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