A 480μW 2GHz ultra low power dual-modulus prescaler in 0.25μm standard CMOS

被引:0
作者
Tiebout, M [1 ]
机构
[1] Infineon Technol AG, Dept Wireless Technol & Innovat, D-81609 Munich, Germany
来源
ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL V: EMERGING TECHNOLOGIES FOR THE 21ST CENTURY | 2000年
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A dual modulus 128/129 prescaler is presented, consuming 480 mu W at a power supply voltage of 1.8V and an input frequency of 2GHz or 98 mu W at a power supply voltage of 1.5V and an input frequency of 1GHz. The prescaler was realized in Infineon 0.25 mu m standard CMOS process using single-phase docked flipflops in the phase-switching prescaler architecture. The circuit was optimized for minimal power drain, maintaining a maximum operating frequency of at least 2GHz. Measured maximal frequency of operation of the prescaler was 2.5GHz. A co-integration of the prescaler with a voltage controlled LC-oscillator showed no detoriation of the -110dBc/Hz phase-noise performance of the VCO at 100kHz frequency offset, thus proving the practical use of the circuit for synthesizers.
引用
收藏
页码:741 / 744
页数:4
相关论文
共 7 条
[1]   A 1.2 GHz CMOS dual-modulus prescaler using new dynamic D-type flip-flops [J].
Chang, BS ;
Park, JB ;
Kim, WC .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (05) :749-752
[2]   A 1.75-GHz/3-V dual-modulus divide-by-128/129 prescaler in 0.7-mu m CMOS [J].
Craninckx, J ;
Steyaert, MSJ .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (07) :890-897
[3]  
CRANINCKX J, 1999, CMOS FREQUENCY SYNTH
[4]   Speed optimization of edge-triggered CMOS circuits for Gigahertz single-phase clocks [J].
Huang, QT ;
Rogenmoser, R .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (03) :456-465
[5]  
KNAPP H, 1998, P 1998 INT S LOW POW
[6]   A 1.6-GHz dual modulus prescaler using the extended true-single-phase-clock CMOS circuit technique (E-TSPC) [J].
Soares, JN ;
Van Noije, WAM .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (01) :97-102
[7]   HIGH-SPEED CMOS CIRCUIT TECHNIQUE [J].
YUAN, J ;
SVENSSON, C .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1989, 24 (01) :62-70