Elixir: A new bandwidth-constrained mapping for Networks-on-chip

被引：14

作者：

Reshadi, Midia ^{[1
]}

Khademzadeh, Ahmad ^{[2
]}

Reza, Akram ^{[1
]}

机构：

[1] Islamic Azad Univ, Sci & Res Branch, Tehran, Iran

[2] Iran Telecommun Res Ctr, Tehran, Iran

来源：

IEICE ELECTRONICS EXPRESS | 2010年 / 7卷 / 02期

关键词：

Networks-on-chip; mapping; communication cost; bandwidth constrains; power consumption; average network latency;

D O I：

10.1587/elex.7.73

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Nowadays, with technology shrinking and the huge demand for supporting multiple applications has led designers to use multiple IP cores within a single chip. Therefore, the designers have proposed Networks-on-chip to overcome the problems of future complex systems. Mapping IPs directly affects NoC design parameters such as latency and power consumption. In this paper we present a power and performance aware mapping technique based on the combination of both the bandwidth-constrained and branch and bound concepts. Results have shown improvements of the latency and power consumption of our technique when compared to other popular NoC mappings.

引用

页码：73 / 79

页数：7

共 17 条

[1]

[Anonymous], 2001, Technical report

[2]

[Anonymous], 2006, Proceedings of the 14th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS'06), DOI [10.1109/MASCOTS.2006.9, DOI 10.1109/MASCOTS.2006.9]

[3]

Benini L., 2002, IEEE Computer, Vol, V35, No, P70

[4] Contention-aware Application Mapping for Network-on-Chip Communication Architectures [J].

Chou, Chen-Ling ;

Marculescu, Radu .

2008 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, 2008, :164-169

[5]

Eisley N., 2004, P 2004 INT C COMPILE, P104, DOI DOI 10.1145/1023833.1023849

[6] Energy-aware mapping for tile-based NoC architectures under performance constraints [J].

Hu, JC ;

Marculescu, R .

ASP-DAC 2003: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, 2003, :233-239

[7] Onyx: A new heuristic bandwidth-constrained mapping of cores onto tile-based Network on Chip [J].

Janidarmian, Majid ;

Khademzadeh, Ahmad ;

Tavanpour, Misagh .

IEICE ELECTRONICS EXPRESS, 2009, 6 (01) :1-7

[8] Medical Education and Attitudes About Acute Otitis Media Guidelines A Survey of Italian Pediatricians and Otolaryngologists [J].

Marchisio, Paola ;

Mira, Eugenio ;

Klersy, Catherine ;

Pagella, Fabio ;

Esposito, Susanna ;

Bianchini, Sonia ;

Di Mauro, Giuseppe ;

Fusi, Michela ;

Nazzari, Erica ;

Tagliabue, Marta ;

Bellussi, Luisa ;

Principi, Nicola .

PEDIATRIC INFECTIOUS DISEASE JOURNAL, 2009, 28 (01) :1-4

[9] Bandwidth-constrained mapping of cores onto NoC architectures [J].

Murali, S ;

De Micheli, G .

DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, 2004, :896-901

[10] A delay model and speculative architecture for pipelined routers [J].

Peh, LS ;

Dally, WJ .

HPCA: SEVENTH INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTING ARCHITECTURE, PROCEEDINGS, 2001, :255-266

← 1 2 →