A Low-power 2.4-GHz Receiver Front-end in 55-nm CMOS

In order to maximize the service life of IoT devices such as wearable medical device, the power consumption requirement of wireless receiver and RF front-end will be critical. This paper presents the design of a low-power 2.4-GHz receiver front-end in a 55 nm CMOS. The designed RF front-end mainly includes a tapped-capacitor resonator, a quadrature double-balance passive mixer, and a "windmill" frequency divider. First, the tapped capacitor resonator is a high-Q network at 2.4 GHz, which is used to obtain the maximum power transfer from the antenna to the quadrature passive mixer. Second, the quadrature passive mixer is used to down-convert the RF signal from the tap capacitor resonator to the baseband capacitor C-L. In order to provide the quadrature double-balanced passive mixer with an accurate duty cycle of 25%, the windmill frequency divider and driver are designed with a DC power of 256 mu W. The results show that the RF receiver front-end achieves a voltage gain of 12.84 dB and a NF of 9.5 dB. The power consumption is 256 mu W.