A genetic algorithm framework for test generation

被引:44
作者
Rudnick, EM [1 ]
Patel, JH
Greenstein, GS
Niermann, TM
机构
[1] Univ Illinois, Ctr Reliable & High Performance Comp, Urbana, IL 61801 USA
[2] Viewlog, Marlborough, MA 01752 USA
[3] Perpetual Syst, Portola Valley, CA 94028 USA
关键词
automatic test generation; genetic algorithms; sequential circuit testing;
D O I
10.1109/43.658571
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Test generation using deterministic fault-oriented algorithms is highly complex and time consuming, New approaches are needed to augment the existing techniques, both to reduce execution time and to improve fault coverage, Genetic algorithms (GA's) have been effective in solving many search and optimization problems, Since test generation is a search process over a large vector space, it is an ideal candidate for GA's. In this work, we describe a GA framework for sequential circuit test generation, The GA evolves candidate test vectors and sequences, using a fault simulator to compute the fitness of each candidate test, Various GA parameters are studied, including alphabet size, fitness function, generation gap, population size, and mutation rate, as web as selection and crossover schemes, High fault coverages were obtained for most of the ISCAS'89 sequential benchmark circuits, and execution times were significantly lower than in a deterministic test generator in most cases.
引用
收藏
页码:1034 / 1044
页数:11
相关论文
共 42 条
[1]   A DIRECTED SEARCH METHOD FOR TEST-GENERATION USING A CONCURRENT SIMULATOR [J].
AGRAWAL, VD ;
CHENG, KT ;
AGRAWAL, P .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1989, 8 (02) :131-138
[2]  
*AMD INC, 1978, AMD DAT BOOK
[3]  
[Anonymous], IRE T ELECT COMPUT
[4]  
[Anonymous], 1989, SYSTEMS ISCAS
[5]  
Baker J, 1987, P 2 INT C GEN ALG, P14, DOI DOI 10.1007/S10489-006-0018-Y
[7]  
BRGLEZ F, 1985, P INT S CIRC SYST JU
[8]  
Cheng W.-T., 1988, Proceedings of the 1988 IEEE International Conference on Computer Design: VLSI in Computers and Processors - ICCD '88 (Cat. No.88CH2643-5), P66, DOI 10.1109/ICCD.1988.25661
[9]   GATTO: A genetic algorithm for automatic test pattern generation for large synchronous sequential circuits [J].
Corno, F ;
Prinetto, P ;
Rebaudengo, M ;
Reorda, MS .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1996, 15 (08) :991-1000
[10]  
Corno F., 1995, Proceedings 13th IEEE VLSI Test Symposium (Cat. No.95TH8068), P29, DOI 10.1109/VTEST.1995.512613