Gate Oxide Degradation of SiC MOSFET in Switching Conditions

被引：100

作者：

Ouaida, Remy ^{[1
,2
]}

Berthou, Maxime ^{[3
]}

Leon, Javier ^{[4
]}

Perpina, Xavier ^{[4
]}

Oge, Sebastien ^{[2
]}

Brosselard, Pierre ^{[3
]}

Joubert, Charles ^{[3
]}

机构：

[1] Univ Lyon, Inst Natl Super Sci Appl, Lab Ampere, F-69621 Villeurbanne, France

[2] Thales Microelect, F-35370 Etrelles, France

[3] Univ Lyon, INSA Lyon, Lab Ampere, F-69621 Villeurbanne, France

[4] Ctr Nacl Microelect, Barcelona 08193, Spain

来源：

IEEE ELECTRON DEVICE LETTERS | 2014年 / 35卷 / 12期

关键词：

Silicon carbide; power MOSFET; aging test; reliability; failure mechanism; switching; oxide degradation; DEPENDENT DIELECTRIC-BREAKDOWN; CAPACITORS;

D O I：

10.1109/LED.2014.2361674

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Under realistic switching conditions, SiC MOSFETs reliability issues remain as a challenge that requires further investigation. In this letter, a specific aging test has been developed to monitor and characterize the electrical parameters of the SiC MOSFET. This allows estimations of the health state and predictions of the remaining lifetime prior to its failure. The gate leakage current seems to be a relevant runaway parameter just before failure. This leakage indicates deterioration of the gate structure. This hypothesis has been validated through analysis of scanning electron microscopy pictures, with a focused ion beam cut showing cracks within the polysilicon.

引用

页码：1284 / 1286

页数：3

共 9 条

[1]

[Anonymous], CIPS 2014 8 INT C IN

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