A 1.24 μA Quiescent Current NMOS Low Dropout Regulator With Integrated Low-Power Oscillator-Driven Charge-Pump and Switched-Capacitor Pole Tracking Compensation

被引:66
作者
Magod, Raveesh [1 ]
Bakkaloglu, Bertan [1 ]
Manandhar, Sanjeev [2 ]
机构
[1] Arizona State Univ, Sch Elect & Comp Engn, Tempe, AZ 85287 USA
[2] Texas Instruments Inc, Tucson, AZ 85711 USA
关键词
Adaptive biasing; dynamic biasing; hybrid biasing; low I-Q low dropout (LDO); NMOS LDO; on-demand buffer; relaxation oscillator; switched-capacitor tracking compensation; TRANSIENT-RESPONSE IMPROVEMENT; DESIGN; AMPLIFIER; BUFFER; LDO;
D O I
10.1109/JSSC.2018.2820708
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Supply regulation using low quiescent current linear regulators helps in extending the battery life of power aware applications with very long standby time. A 1.24 mu A quiescent current NMOS low dropout (LDO) that uses a hybrid bias current generator (HBCG) which boosts the bias current dynamically and adaptively to improve the transient response is presented in this paper. A bias-current scalable error amplifier with an on-demand pull-up/pull-down buffer drives the NMOS pass device. The error amplifier is powered with an integrated dynamic frequency charge pump to ensure low dropout voltage. A low-power relaxation oscillator (LPRO) generates the charge pump clocks. A novel switched-capacitor pole tracking (SCPT) compensation scheme is proposed to ensure stability up to maximum load current of 150 mA with a low-ESR 1 mu F output capacitor. Designed in a 0.25 mu m CMOS process, the LDO has an output voltage range of 1-3 V, a dropout voltage of 240 mV, and a core area of 0.11 mm(2).
引用
收藏
页码:2356 / 2367
页数:12
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