Synthesis of Fault-Tolerance Circuits by Genetic Algorithms

被引：0

作者：

Shlyakov, Alexandr N. ^{[1
]}

Kamenskih, Anton N. ^{[1
]}

Mazunina, Elizaveta S. ^{[1
]}

机构：

[1] Perm Natl Res Polytech Univ, Elect Engn Dept, Perm, Russia

来源：

PROCEEDINGS OF THE 2017 IEEE RUSSIA SECTION YOUNG RESEARCHERS IN ELECTRICAL AND ELECTRONIC ENGINEERING CONFERENCE (2017 ELCONRUS) | 2017年

关键词：

synthesis; heuristic algorithms; genetic algorithms; fault-tolerance;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

For optimal synthesis of discrete logic devices, we have to use the exhaustive search algorithms, accompanied by a large amount of computational work. In practice, the synthesis is carried out with the help of heuristic algorithms that are looking for sub-optimal decision. To achieve fault-tolerance functionally complete tolerance element is used. Genetic algorithm used for decision search. It is a heuristic search algorithm, with the use of mechanisms that resemble biological evolution. Method of synthesis of circuits in basis of fault-tolerance functionally complete tolerance element was developed. Verification of algorithm and calculation of the probability of finding the result were performed.

引用

页码：339 / 341

页数：3