A very low power CMOS, 1.5V, 2.5GHz prescaler

被引:0
作者
Mirzaei, A [1 ]
机构
[1] Sharif Univ Technol, Tehran, Iran
来源
2002 45TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL III, CONFERENCE PROCEEDINGS | 2002年
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
A very low power and high speed prescaler was designed in 2.5GHz frequency range. It works with 1.5V power supply and dissipates about 1mW. Implemented in 0.25u standard CMOS technology, this prescaler can operate up to 3GHZ range.
引用
收藏
页码:378 / 380
页数:3
相关论文
共 4 条
[1]   A 1.75-GHz/3-V dual-modulus divide-by-128/129 prescaler in 0.7-mu m CMOS [J].
Craninckx, J ;
Steyaert, MSJ .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (07) :890-897
[2]   Speed optimization of edge-triggered CMOS circuits for Gigahertz single-phase clocks [J].
Huang, QT ;
Rogenmoser, R .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (03) :456-465
[3]   High-speed architecture for a programmable frequency divider and a dual-modulus prescaler [J].
Larsson, PO .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (05) :744-748
[4]   HIGH-SPEED CMOS CIRCUIT TECHNIQUE [J].
YUAN, J ;
SVENSSON, C .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1989, 24 (01) :62-70