Implementation of piecewise-linear DC analysis in APLAC

被引：0
|
作者：
Roos, J [1 ]
Valtonen, M [1 ]
Virtanen, J [1 ]
机构：
[1] Aalto Univ, Dept Elect & Commun Engn, Circuit Theory Lab, FIN-02015 Espoo, Finland
来源：
ICES 2002: 9TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-111, CONFERENCE PROCEEDINGS | 2002年
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
Recently, we have developed many extensions to the piecewise-linear (PWL) DC analysis method. In this paper, working solutions are proposed for filling the gap between the academically oriented method and real-world DC-simulation problems. Thanks to the solutions proposed, our PWL DC analysis method is, finally, general and efficient enough to be implemented in a general-purpose circuit simulator. This paper describes the APLAC implementation of our PWL DC analysis method. The method is combined with the conventional DC analysis method of APLAC in a robust and user-friendly manner. The operation of the APLAC implementation is demonstrated with simulation examples.
引用
收藏
页码：1139 / 1142
页数：4
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