Extraction of electrical test parameters by artificial neural network

被引:0
作者
Ke, Joseph Kian Seng [1 ]
Rao, M. V. C. [1 ]
机构
[1] Univ Multimedia, Fac Engn & Technol, Melaka 75450, Malaysia
来源
INTERNATIONAL JOURNAL OF INDUSTRIAL ENGINEERING-THEORY APPLICATIONS AND PRACTICE | 2006年 / 13卷 / 01期
关键词
artificial neural network; back propagation; electrical test; process control monitoring; wafer fabrication;
D O I
暂无
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In semiconductor industry, cycle time of the wafer fabrication is very crucial and one of the contributing factors comes from wafer testing. This paper presents the application of back propagation Artificial Neural Network (ANN) model designed to infer electrical test parameters from the given list of parameters with the intention of reducing test time, to enhance throughput, and to improve cycle time. It also investigates if the ANN based inference system can be established as a robust method for parameter extraction to provide an accurate electrical value to minimize false measurement. It is shown that the ANN model does quite an excellent job and the predicted values are in good agreement with the measured values. Significance: Test time and measurement accuracy are extremely crucial. The ANN model proposed herein serves to reduce test time and improve data integrity to ensure cost efficiency and product quality.
引用
收藏
页码:71 / 80
页数:10
相关论文
共 16 条
  • [1] *AG TECHN, 2001, ULTR LOW CURR DC CHA
  • [2] BHATIKAR SR, 2002, IEEE T SEMICONDUCTOR, V15
  • [3] BRAHA D, 2002, IEEE T SEMICONDUCTOR, V15
  • [4] *BROOK AUT, 1999, COM TM VERS 3 5 HELP
  • [5] FLEXER A, 1996, P 13 EUR M CYB SYST, V2, P1005
  • [6] HAN SS, 1996, IEEE T SEMICONDUCTOR, V9
  • [7] HAN SS, 1997, IEEE T SEMICONDUCTOR, V10
  • [8] HAYTER AJ, 2002, PROB STAT ENG SCI
  • [9] KARLSSON P, 1996, IEEE T SEMICONDUCTOR, V9
  • [10] LAWRENCE S, 1997, IEEE T SEMICONDUCTOR, V8