Hardware Acceleration of SVM Training for Real-Time Embedded Systems: Overview

被引:4
作者
Amezzane, Ilham [1 ]
Fakhri, Youssef [1 ]
El Aroussi, Mohamed [1 ]
Bakhouya, Mohamed [2 ]
机构
[1] Ibn Tofail Univ, Fac Sci, LaRIT Lab, Kenitra, Morocco
[2] Int Univ Rabat, Fac Comp & Logist, LERMA Lab, Sala Aljadida, Morocco
来源
RECENT ADVANCES IN MATHEMATICS AND TECHNOLOGY | 2020年
关键词
SVM; GPU; FPGA; DESIGN;
D O I
10.1007/978-3-030-35202-8_7
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Support vector machines (SVMs) have proven to yield high accuracy and have been used widespread in recent years. However, the standard versions of the SVM algorithm are very time-consuming and computationally intensive, which places a challenge on engineers to explore other hardware architectures than CPU, capable of performing real-time training and classifications while maintaining low power consumption in embedded systems. This paper proposes an overview of works based on the two most popular parallel processing devices: GPU and FPGA, with a focus on multiclass training process. Since different techniques have been evaluated using different experimentation platforms and methodologies, we only focus on the improvements realized in each study.
引用
收藏
页码:131 / 139
页数:9
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