A four-Terabit packet switch supporting long round-trip times

被引：42

作者：

Abel, F

Minkenberg, C

Luijten, RP

Gusat, M

Iliadis, I

机构：

[1] IBM Research, Zurich Research Laboratory, Ruschlikon

[2] IBM Research, Zurich Research Laboratory, CH-8803 Rüschlikon

来源：

IEEE MICRO | 2003年 / 23卷 / 01期

关键词：

D O I：

10.1109/MM.2003.1179894

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

THIS 4-TBPS PACKET SWITCH USES A COMBINED INPUT- AND CROSSPOINT-QUEUED (C\CQ) STRUCTURE WITH VIRTUAL OUTPUT QUEUING AT THE INGRESS TO ACHIEVE THE SCALABILITY OF INPUT-BUFFERED SWITCHES, THE PERFORMANCE OF OUTPUT-BUFFERED SWITCHES, AND LOW LATENCY.

引用

页码：10 / 24

页数：15

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