A D-Band Keyable High Efficiency Frequency Quadrupler

被引:12
作者
Bao, Mingquan [1 ]
Kozhuharov, Rumen [2 ]
Chen, Jingjing [1 ]
Zirath, Herbert [1 ,2 ]
机构
[1] Ericsson AB, Ericsson Res, SE-41756 Gothenburg, Sweden
[2] Chalmers, Dept Microtechnol & Nanosci, SE-41296 Gothenburg, Sweden
关键词
DHBT; frequency quadrupler; InP; modulator; on-off keying;
D O I
10.1109/LMWC.2014.2350694
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A D-band frequency quadrupler consisting of two cascaded push-push doublers is designed and manufactured in a 0.25 mu m InP DHBT technology. Each doubler has a Marchand balun implemented by broadside-coupled transmission lines, folded in a rectangular shape. The second balun, operating at a half of output frequency, is located inside of the first one for minimizing the chip size. The frequency quadrupler with a dc power consumption of 47 mW has a maximum conversion gain of 2 dB, and exhibits 12 to 25 dBc rejection ratio of the undesired first to fifth harmonics in the frequency range from 110 to 130 GHz. The quadrupler demonstrates a power efficiency of 10%, which is the highest among published quadruplers, as well as the highest conversion gain and an output power of 5 similar to 7 dBm without using power amplifiers. The chip size is 0.77 mm(2). By switching a cascode transistor, the quadrupler can also be used as an on-off keying modulator.
引用
收藏
页码:793 / 795
页数:3
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