Analysis of Low Voltage Rail-to-rail CMOS Operational Amplifier Design

被引：0

作者：

Khare, Kavita ^{[1
]}

Khare, Nilay ^{[2
]}

Sethiya, Pawan Kumar ^{[1
]}

机构：

[1] Dept E&C MANIT Bhopal, Bhopal, India

[2] MPGovt Tech Educ, State Project Facilitat, Bhopal, India

来源：

ICED: 2008 INTERNATIONAL CONFERENCE ON ELECTRONIC DESIGN, VOLS 1 AND 2 | 2008年

关键词：

CMOS; Operational Amplifier; Low-Voltage; Rail-to-rail;

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

As the supply voltage to a standard CMOS op-amp is reduced, the input common mode range and the output swing get reduced drastically. Special circuits have to be used to raise them up to rail-to-rail supply voltage. This paper describes the design of a low-voltage CMOS rail-to-rail input output operational amplifier. Analysis of input signal compression circuitry that compresses rail-to-rail input signals to the input range of the following folded-cascode operational amplifier is done. The input signal compression circuitry and the following folded-cascode operational amplifier together comprise an input-output rail-to-rail operational amplifier. It is concluded that Cadence Spectre simulation tool with 0.18-mu m CMOS validates the operation of the rail-to-rail CMOS amplifier with supply voltage of 1 V and bias current of 3.1 mu A.

引用

页码：45 / +

页数：2