An Area-Efficient Implementation of a Message Authentication Code (MAC) Algorithm for Cryptographic Systems

In this paper, an area-efficient hardware implementation of the lightweight Chaskey algorithm is present. The major targets of this work are resource-constrained devices. An efficient and simple design scheme is employed in order to achieve the goal. Different implementation methods of Chaskey algorithm are investigated. A hardware implementation that requires only 333433 gate equivalent is achieved with an operating clock frequency of 1 MHz.