The aim of this paper is to achieve a correct description of programming charge distribution in NROM memory devices. This is essential to prove device functionality and to extrapolate scaling limits of devices. To this purpose we use an inverse modeling based methodology using measurements easily performed, such as subthreshold characteristics and threshold voltage measurements. We will show a simple model of programming charge distribution that can be easily implemented in two-dimensional (2-D) TCAD simulations. Results show good agreement between measured and simulated currents under different bias conditions and for different programming levels.