compact I-Vmodeling;
deep-submicron MOSFET;
LDD;
series resistance;
D O I:
10.1109/16.842978
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
A physically-based series resistance model for deep-submicron MOSFET is presented, which includes a bias-dependent (intrinsic) component and a bias-independent (extrinsic) component. The model is semi-empirical and consists of two physics-based fitting parameters to be extracted with a single measurement, which can be extended to all gate-length and bias conditions. The model can be applied to drain-current prediction and optimization due to process fluctuations such as LDD junction depth and spacer thickness.