Analysis of high-performance flip-flops for submicron mixed-signal applications

被引：11
作者：
Jiménez, R [1 ]
Parra, P
Sanmartín, P
Acosta, AJ
机构：
[1] Univ Huelva, Dept IESIA, Huelva, Spain
[2] Univ Sevilla, CNM, Inst Microelect Sevilla, E-41012 Seville, Spain
来源：
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING | 2002年 / 33卷 / 02期
关键词：
analog-digital mixed signal; flip-flops; switching noise; submicron CMOS VLSI;
D O I：
10.1023/A:1021216015286
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents a detailed analysis of high-performance edge-triggered memory elements for deep submicron mixed-signal applications. The variations of the main parameters (power, delay, peak of supply current) with supply voltage, as well as timing restrictions have been studied. Especial emphasis has been given to switching-noise generation, an aspect of important concern in mixed-signal applications. We have analyzed the sources of switching noise, noticing that, the less noisy flip-flops are those based on differential structures.
引用
收藏
页码：145 / 156
页数：12
相关论文
共 19 条
  • [1] Acosta AJ, 2000, LECT NOTES COMPUT SC, V1918, P316
  • [2] [Anonymous], 1994, PRINCIPLES CMOS VLSI
  • [3] Aragones X., 1999, ANAL SOLUTIONS SWITC
  • [4] Circuit techniques in a 266-MHz MMX-enabled processor
    Draper, D
    Crowley, M
    Holst, J
    Favor, G
    Schoy, A
    Trull, J
    BenMeir, A
    Khanna, R
    Wendell, D
    Krishna, R
    Nolan, J
    Mallick, D
    Partovi, H
    Roberts, M
    Johnson, M
    Lee, T
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (11) : 1650 - 1664
  • [5] A 2.2-W, 80-MHZ SUPERSCALAR RISC MICROPROCESSOR
    GEROSA, G
    GARY, S
    DIETZ, C
    PHAM, D
    HOOVER, K
    ALVAREZ, J
    SANCHEZ, H
    IPPOLITO, P
    NGO, T
    LITCH, S
    ENO, J
    GOLAB, J
    VANDERSCHAAF, N
    KAHLE, J
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1994, 29 (12) : 1440 - 1454
  • [6] CMOS sense amplifier-based flip-flop with two N-C2MOS output latches
    Kim, JC
    Jang, YC
    Park, HJ
    [J]. ELECTRONICS LETTERS, 2000, 36 (06) : 498 - 500
  • [7] A new family of semidynamic and dynamic flip-flops with embedded logic for high-performance processors
    Klass, F
    Amir, C
    Das, A
    Aingaran, K
    Truong, C
    Wang, R
    Mehta, A
    Heald, R
    Yee, G
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (05) : 712 - 716
  • [8] Differential CMOS edge-triggered flip-flop based on clock racing
    Moisiadis, Y
    Bouras, I
    [J]. ELECTRONICS LETTERS, 2000, 36 (12) : 1012 - 1013
  • [9] A 160-MHz, 32-b, 0.5-W CMOS RISC microprocessor
    Montanaro, J
    Witek, RT
    Anne, K
    Black, AJ
    Cooper, EM
    Dobberpuhl, DW
    Donahue, PM
    Eno, J
    Hoeppner, GW
    Kruckemyer, D
    Lee, TH
    Lin, PCM
    Madden, L
    Murray, D
    Pearce, MH
    Santhanam, S
    Snyder, KJ
    Stephany, R
    Thierauf, SC
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (11) : 1703 - 1714
  • [10] CMOS current steering logic for low-voltage mixed-signal integrated circuits
    Ng, HT
    Allstot, DJ
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 1997, 5 (03) : 301 - 308
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