Classification of Power System Disturbances Using Support Vector Machine in FPGA

被引:0
作者
Patel, Vivek [1 ]
机构
[1] MNNIT, Allahabad, Uttar Pradesh, India
来源
INTELLIGENT COMPUTING TECHNIQUES FOR SMART ENERGY SYSTEMS | 2020年 / 607卷
关键词
Support vector machine; FPGA; Capacitive switching; Load switching;
D O I
10.1007/978-981-15-0214-9_87
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
Support vector machine (SVM) is a standard classification technique use to envisage accuracy of extracted data in the power system. A real time implementation of SVM is yet at premature phase, because of requirement of advance parallel calculation of features. In this paper, Software simulation of SVM using MATLAB and Hardware Co-simulation of SVM in FPGA is designed to classify power quality (PQ) disturbances. Initially IEEE 13 bus system is designed in PSCAD to generate various type of transient signals, caused by heavy load switching and capacitive switching. Here, three different statistical features are extracted for feature classification namely Means, Variance, and Standard Deviation of the signal. A Xilinx system generator block sets are used to simulate SVM using radial basis kernel (RBF) function. Simulation result, reveals that the FPGA based SVM classification system is fast and predicts high classification accuracy.
引用
收藏
页码:825 / 835
页数:11
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