Asymmetry of RTS Characteristics along Source-Drain Direction and Statistical Analysis of Process-Induced RTS

被引:10
作者
Abe, Kenichi [1 ]
Kumagai, Yuki [1 ]
Sugawa, Shigetoshi [1 ]
Watabe, Shunichi [1 ]
Fujisawa, Takafumi [1 ]
Teramoto, Akinobu [2 ]
Ohmi, Tadahiro [3 ]
机构
[1] Tohoku Univ, Grad Sch Engn, Sendai, Miyagi 980, Japan
[2] Tohoku Univ, New Ind Creat Hatchery Ctr, Sendai, Miyagi 980, Japan
[3] Tohoku Univ, WPI Res Ctr, Sendai, Miyagi 980, Japan
来源
2009 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM, VOLS 1 AND 2 | 2009年
关键词
component; random telegraph signal (RTS); Statistical analysis; variability; asymmetry; prasma damage; silicon oxinitride (SiON); RANDOM TELEGRAPH SIGNAL; NOISE; MEMORY;
D O I
10.1109/IRPS.2009.5173398
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
In this work, we investigated random telegraph signal (RTS) amplitude and the probability of trap empty along two different drain current directions for various gate lengths using novel test structures which enable to measure RTS in large numbers. Asymmetry of RTS amplitude along source-drain current direction increases as gate length shortens because a trap near the gate edge dominates RTS phenomenon as gate length shortens. The probability of trap empty shows weak positive correlation between both directions but asymmetric difference of that partially remains. We also investigated RTS characteristics dependence on kinds of gate insulator films and plasma damages of back-end-of-line (BEOL). Silicon oxynitride gate insulator film has bad effect on RTS and plasma damage does not appear as the increase of RTS amplitude up to 51,385 of antenna ratio.
引用
收藏
页码:996 / +
页数:3
相关论文
共 23 条
  • [1] Random telegraph signal statistical analysis using a very large-scale array TEG with IM MOSFETs
    Abe, K.
    Sugawa, S.
    Watabe, S.
    Miyamoto, N.
    Teramoto, A.
    Kamata, Y.
    Shibusawa, K.
    Toita, M.
    Ohmi, I.
    [J]. 2007 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2007, : 210 - +
  • [2] RTS amplitudes in decananometer MOSFETs: 3-D Simulation Study
    Asenov, A
    Balasubramaniam, R
    Brown, AR
    Davies, JH
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2003, 50 (03) : 839 - 845
  • [3] MODEL FOR DRAIN CURRENT RTS AMPLITUDE IN SMALL-AREA MOS-TRANSISTORS
    BUISSON, ORD
    GHIBAUDO, G
    BRINI, J
    [J]. SOLID-STATE ELECTRONICS, 1992, 35 (09) : 1273 - 1276
  • [4] NROM: A novel localized trapping, 2-bit nonvolatile memory cell
    Eitan, B
    Pavan, P
    Bloom, I
    Aloni, E
    Frommer, A
    Finzi, D
    [J]. IEEE ELECTRON DEVICE LETTERS, 2000, 21 (11) : 543 - 545
  • [5] Random telegraph noise in flash memories - Model and technology scaling
    Fukuda, Koichi
    Shimizu, Yuui
    Amemiya, Kazumi
    Kamoshida, Masahiro
    Hu, Chenming
    [J]. 2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2, 2007, : 169 - +
  • [6] Ghetti A, 2008, INT EL DEVICES MEET, P835
  • [7] ON THE THEORY OF CARRIER NUMBER FLUCTUATIONS IN MOS DEVICES
    GHIBAUDO, G
    [J]. SOLID-STATE ELECTRONICS, 1989, 32 (07) : 563 - 565
  • [8] Kim J. Y., 2005, IEEE WORKSH CCDS AIS, P149
  • [9] NOISE IN SOLID-STATE MICROSTRUCTURES - A NEW PERSPECTIVE ON INDIVIDUAL DEFECTS, INTERFACE STATES AND LOW-FREQUENCY (1/F) NOISE
    KIRTON, MJ
    UREN, MJ
    [J]. ADVANCES IN PHYSICS, 1989, 38 (04) : 367 - 468
  • [10] Random telegraph signal in flash memory: Its impact on scaling of multilevel flash memory beyond the 90-nm node
    Kurata, Hideaki
    Otsuga, Kazuo
    Kotabe, Akira
    Kajiyama, Shinya
    Osabe, Taro
    Sasago, Yoshitaka
    Narumi, Shunichi
    Tokami, Kenji
    Kamohara, Shiro
    Tsuchiya, Osamu
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2007, 42 (06) : 1362 - 1369