Application challenges with double patterning technology (DPT) beyond 45nm

被引:16
|
作者
Park, Jungchul [1 ]
Hsu, Stephen [1 ]
Van Den Broeke, Douglas [1 ]
Chen, J. Fung [1 ]
Dusa, Mircea [2 ]
Socha, Robert [2 ]
Finders, Jo [3 ]
Vleeming, Bert [3 ]
van Oosten, Anton [3 ]
Nikolsky, Peter [3 ]
Wiaux, Vincent [4 ]
Hendrickx, Eric [4 ]
Bekaert, Joost [4 ]
Vandenberghe, Geert [4 ]
机构
[1] ASML Mask Tools, 4800 Great Amer Pkwy, Santa Clara, CA 95054 USA
[2] ASML Technol Dev Ctr, Santa Clara, CA 95054 USA
[3] ASML Netherlands BV, NL-5504 DR Veldhoven, Netherlands
[4] IMEC Vzw, B-3001 Leuven, Belgium
来源
PHOTOMASK TECHNOLOGY 2006, PTS 1 AND 2 | 2006年 / 6349卷
关键词
double patterning technology; DPT; double exposure technology; DET; such as Double Dipole Lithography; DDL; coloring line method (CLN); coloring space method (CSP); feature stitching; mask error factor; MEF; and model-based OPC;
D O I
10.1117/12.692921
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
Double patterning technology (DPT) is a promising technique that bridges the anticipated technology gap from the use of 193 nm immersion to EUV for the half-pitch device node beyond 45 nm. The intended mask pattern is formed by two independent patterning steps. Using DPT, there is no optical imaging correlation between the two separate patterning steps except for the impact from mask overlay. In each of the single exposure step, we can relax the dense design pattern pitches by decomposing them into two half-dense ones. This allows a higher k(1) imaging factor for each patterning step. With combined patterns, we can achieve overall k(1) factor that exceeds the conventional Rayleigh resolution limit. This paper addresses DPT application challenges with respect to both mask error factor (MEF) and 2D patterning. In our simulations using DPT with relaxed feature pitch for each exposure step, the MEF for the line/space is fairly manageable for 32 nm half-pitch and below. The real challenge for the 32 nm half-pitch and below with DPT is how to deal with the printing of small 2D features resulting from the many cutting sites due to feature decomposition. Each split of a dense pattern generates two difficult-to-print line-end type features with dimension less than one-fifth or one-sixth of ArF wavelength. Worse, the proximity environment of the 2D cut features can then become quite complex. How to stitch them correctly back to the original target requires careful attention. Applying target bias can improve the printing performance in general. But using a model-based stitching error correction method seems to be a preferred solution.
引用
收藏
页数:12
相关论文
共 50 条
  • [31] The influence of the size effect of copper interconnects on RC delay variability beyond 45nm technology
    Kitada, H.
    Suzuki, T.
    Kimura, T.
    Kudo, H.
    Ochimizu, H.
    Okano, S.
    Tsukune, A.
    Suda, S.
    Sakai, S.
    Ohtsuka, N.
    Tabira, T.
    Shirasu, T.
    Sakamoto, M.
    Matsuura, A.
    PROCEEDINGS OF THE IEEE 2007 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE, 2007, : 10 - 12
  • [32] A novel current reference in 45nm cmos technology
    Nagulapalli, R.
    Hayatleh, K.
    Barker, S.
    Zourob, S.
    Venkatareddy, A.
    PROCEEDINGS OF THE 2017 IEEE SECOND INTERNATIONAL CONFERENCE ON ELECTRICAL, COMPUTER AND COMMUNICATION TECHNOLOGIES (ICECCT), 2017,
  • [33] Limitations of optical reticle inspection for 45nm node and beyond
    Teuber, S.
    Bzdurek, A.
    Duerr, A. C.
    Heumann, J.
    Holfeld, C.
    PHOTOMASK TECHNOLOGY 2006, PTS 1 AND 2, 2006, 6349
  • [34] Double patterning overlay budget for 45 nm technology node single and double mask approach
    Rigolli, Pierluigi
    Turco, Catia
    Iessi, Umberto
    Capetti, Gianfranco
    Canestrari, Paolo
    Fradilli, Aldo
    JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 2007, 25 (06): : 2461 - 2465
  • [35] Embedded SRAM Circuit Design Technologies for a 45nm and beyond
    Yamauchi, Hiroyuki
    ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2007, : 1028 - 1033
  • [36] Requirements of photomask registration for the 45nm node and beyond: is it possible?
    Choi, Jin
    Kim, Hee Bom
    Lee, Sang Hee
    Lee, Dong Hun
    Jeong, Hae Young
    Lee, Jeung Woo
    Kim, Byung Gook
    Woo, Sang-Gyun
    Cho, Han Ku
    PHOTOMASK TECHNOLOGY 2007, PTS 1-3, 2007, 6730
  • [37] Integrated NiSi defect reductions in 45nm node and beyond
    Lai, Jerander
    Chen, Yi-Wei
    Ho, Nien-Ting
    Lin, J. F.
    Huang, C. C.
    Wu, J. Y.
    2011 IEEE INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE AND MATERIALS FOR ADVANCED METALLIZATION (IITC/MAM), 2011,
  • [38] Analysis of precise CD control for 45nm node and beyond
    Sumiyoshi, Y
    Mikami, K
    Hasegawa, Y
    Yoshihara, T
    Nagai, Y
    Yamada, A
    Mori, K
    Ogawa, T
    Suda, S
    Optical Microlithography XVIII, Pts 1-3, 2005, 5754 : 204 - 214
  • [39] The Defectivity Reduction on Hole Layers beyond 45nm Node
    Li, Gaorong
    Hu, Huayong
    Wu, Qiang
    Lin, Yishih
    Gu, Yiming
    CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE 2012 (CSTIC 2012), 2012, 44 (01): : 291 - 296
  • [40] Mask patterning challenges beyond 150 nm
    Gesley, M
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1998, 37 (12B): : 6675 - 6680