Jitter Robust DRAM Modeling

被引：0

作者：

Sayfullah, Md. ^{[1
]}

机构：

[1] Qimonda AG, Munich, Germany

来源：

PROCEEDINGS OF INDS '09: SECOND INTERNATIONAL WORKSHOP ON NONLINEAR DYNAMICS AND SYNCHRONIZATION 2009 | 2009年 / 4卷

关键词：

PLL; DLL; mixed PLL-DLL; DRAM jitter; DRAM; jitter transfer function; LOOP;

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

This paper presents jitter robust DRAM modeling. Jitter analysis of mixed mode PLL-DLL in DRAM environment has been carried out. According to the jitter type, this model can be used as pure PLL or pure DLL or a mixed PLL-DLL. It is observed that mixed mode PLL-DLL architecture can combine the advantage from both PLL and DLL to reduce jitter in DRAM which is very important to cover both consumer and commodity DRAM applications.

引用

页码：150 / 154

页数：5

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