A Fully Integrated X-Band Phased-Array Transceiver in 0.13-μm SiGe BiCMOS Technology

This paper presents the design of an X-band phased-array transceiver core chip in 0.13-mu m SiGe BiCMOS technology. The system is based on the all-RF architecture and contains switches, low-noise amplifier (LNA), power amplifier (PA), and the common leg 5-bit phase shifter with loss compensation amplifiers. A distributed structure is used in the gain amplifiers design to ease the multi-stage gain roll-off in the transmit (TX)/receive (RX) paths. A distributed LNA is utilized in the RX path to achieve broadband amplification with acceptable noise figure (NF) while a stacked PA is utilized in the TX path to get high output power. In the RX mode, the receiver demonstrates a gain of > 25 dB, an average NF of 3 degrees dB, an output P-1 dB of 6 dBm, a root mean square (rms) phase error less than 3.8 degrees and an rms gain error less than 1.2 dB from 9 to 11 GHz; while dissipating 352-mW dc power. In the TX mode, the transmitter demonstrates a gain of > 22 dB, an output P-1dB of 28 dBm, an rms phase error less than 3 degrees, and an rms gain error less than 0.6 dB from 9 to 11 GHz; while dissipating 4.128-W dc power. The whole transceiver occupies 5.2 X 3 mm(2) chip area including the testing pads.