High Performance of Ge nMOSFETs Using SiO2 Interfacial Layer and TiLaO Gate Dielectric

被引：13

作者：

Chen, W. B. ^{[1
]}

Chin, Albert ^{[1
,2
]}

机构：

[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 300, Taiwan

[2] Nanoelect Consortium Taiwan, Hsinchu 300, Taiwan

来源：

IEEE ELECTRON DEVICE LETTERS | 2010年 / 31卷 / 01期

关键词：

Ge; nMOSFETs; TaN; TiLaO; SURFACE PASSIVATION; ELECTRON-MOBILITY; SOURCE/DRAIN; ENHANCEMENT; ACTIVATION; CAPACITORS; MOSFETS; STACK;

D O I：

10.1109/LED.2009.2035719

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Using a SiO2 interfacial layer and a high-kappa gate TiLaO dielectric, the TaN/TiLaO/SiO2 on Ge/Si nMOSFETs in this study showed a small 1.1-nm capacitance equivalent thickness, a good high field mobility of 201 cm(2)/(V . s) at 0.5 MV/cm, and a very low OFF-state leakage current of 3.5 x 10(-10) A/mu m. The self-aligned and gate-first metal-gate/high-kappa and Ge nMOSFETs were processed using standard ion implantation and 550 degrees C RTA. The proposed devices are fully compatible with current VLSI fabrication methods.

引用

页码：80 / 82

页数：3

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