Large-Area Fabrication of Patterned ZnO-Nanowire Arrays Using Light Stamping Lithography

被引:6
作者
Hwang, Jae K. [1 ]
Cho, Sangho [1 ]
Seo, Eun K. [1 ]
Myoung, Jae M. [2 ]
Sung, Myung M. [1 ]
机构
[1] Hanyang Univ, Dept Chem, Seoul 133791, South Korea
[2] Yonsei Univ, Dept Mat Sci & Engn, Seoul 120749, South Korea
关键词
light stamping lithography; ZnO nanowire; patterning; self-assembly; field-effect transistor; SELF-ASSEMBLED MONOLAYERS; THIN-FILMS; GROWTH; SINGLE; SILICON; NANOTUBES; FEATURES; GOLD;
D O I
10.1021/am900580v
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
We demonstrate selective adsorption and alignment of ZnO nanowires on patterned poly(dimethylsiloxane) (PDMS) thin layers with (aminopropyl)siloxane self-assembled monolayers (SAMs). Light stamping lithography (LSL) was used to prepare patterned PDMS thin layers as neutral passivation regions on Si substrates. (3-Aminopropyl)triethoxysilane-based SAMs were selectively formed only on regions exposing the silanol groups of the Si substrates. The patterned positively charged amino groups define and direct the selective adsorption of ZnO nanowires with negative surface charges in the protic solvent. This procedure can be adopted in automated printing machines that generate patterned ZnO-nanowire arrays on large-area substrates. To demonstrate its usefulness, the LSL method was applied to prepare ZnO-nanowire transistor arrays on 4-in, Si wafers.
引用
收藏
页码:2843 / 2847
页数:5
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