On-die termination resistors with analog impedance control for standard CMOS technology

被引:14
作者
Fan, YP [1 ]
Smith, JE [1 ]
机构
[1] Intel Corp, Hillsboro, OR 97124 USA
关键词
analog; CMOS; feedback; low power; on-die termination; operational amplifier;
D O I
10.1109/JSSC.2002.807397
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, we have designed a new voltage-controlled resistor for the purpose of on-die termination in standard CMOS technology. Current-voltage (I-V) characteristics show that this on-die termination resistor has good linearity across a wide range of gate bias, and is suitable for analog impedance control technique using a feedback loop. The analog impedance control technique has the advantage of continuous impedance adjustment without interfering with normal data transmission and receiving operations. Experimental I-V characteristics show excellent linearity and are in good agreement with simulations. Measured resistance values are within +/-5% over process, temperature, and across die variations.
引用
收藏
页码:361 / 364
页数:4
相关论文
共 4 条
[1]   2.4Gbit/s CML I/Os with integrated line termination resistors realized in 0.5μm BiCMOS technology [J].
Conrad, H .
PROCEEDINGS OF THE 1997 BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING, 1997, :120-122
[2]  
GRAY PR, 1993, ANAL DESIGN ANAL INT
[3]  
Griffin J, 1999, 42ND MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, VOLS 1 AND 2, P706
[4]   A TUNABLE CMOS-DRAM VOLTAGE LIMITER WITH STABILIZED FEEDBACK-AMPLIFIER [J].
HORIGUCHI, M ;
AOKI, M ;
ETOH, J ;
TANAKA, H ;
IKENAGA, S ;
ITOH, K ;
KAJIGAYA, K ;
KOTANI, H ;
OHSHIMA, K ;
MATSUMOTO, T .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1990, 25 (05) :1129-1135