Nine-level Asymmetrical Single Phase Multilevel Inverter Topology with Low switching frequency and Reduce device counts

被引：0

作者：

Bin Arif, M. Saad ^{[1
]}

Ayob, Shahrine Md. ^{[1
]}

Iqbal, Atif ^{[2
]}

Williamson, Sheldon ^{[3
]}

Salam, Zainal ^{[1
,4
]}

机构：

[1] Univ Technol Malaysia, Fac Elect Engn, Power Engn Dept, Skudai, Johor, Malaysia

[2] Qatar Univ, Dept Elect Engn, Doha, Qatar

[3] UOIT, Dept Elect Comp & Software Engn, Oshawa, ON, Canada

[4] Univ Technol Malaysia, Ctr Elect Energy Syst, Skudai, Johor, Malaysia

来源：

2017 IEEE INTERNATIONAL CONFERENCE ON INDUSTRIAL TECHNOLOGY (ICIT) | 2017年

关键词：

multilevel inverter; asymmetrical; Total Harmonic Distortion(THD); low-frequency switching; CONVERTER; NUMBER;

D O I：

暂无

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

This paper presents a new asymmetrical single-phase multilevel inverter topology capable of producing nine-level output voltage with reduce device counts. In order to obtain the desired output voltage, dc sources are connected in all the combination of addition and subtraction through different switches. Proposed topology results in reduction of dc source, switch counts, losses, cost and size of the inverter. Comparison between the existing topologies shows that the proposed topology yields less component counts. Proposed topology is modeled and simulated using Matlab-Simulink software in order to verify the performance and feasibility of the circuit. A low frequency switching strategy is also proposed in this work. The results show that the proposed topology is capable to produce a nine-level output voltage with less number of component counts and acceptable harmonic distortion content.

引用

页码：1516 / 1521

页数：6